Development of Phase Lock Loop System for Synchronisation of a Hybrid System with the Grid

Authors

  • A. S. Abubakar Department of Electrical and Computer Engineering, Ahmadu Bello University, Zaria, Nigeria.
  • D. A. Akoh Department of Electrical and Computer Engineering, Ahmadu Bello University, Zaria, Nigeria.
  • B. O. Sadiq Department of Electrical and Computer Engineering, Ahmadu Bello University, Zaria, Nigeria.
  • J. Aminu Department of Electrical and Computer Engineering, Ahmadu Bello University, Zaria, Nigeria.

Keywords:

Phase locked loop (PLL), grid synchronisation, simulations, PI regulator, hybrid system

Abstract

Phase locked loop (PLL) is an important part of the control unit of the grid connected power converter. The method of zero crossing detection (ZCD) does not produce accurate phase information when grid is non-ideal. In this work, a synchronous reference frame (SRF) PLL method to obtain accurate phase information when the grid voltages are unbalanced is proposed. The performances of the PLL have been verified for ideal and abnormal grid conditions such as unbalance, voltage sag, faults condition etc. Based on the results obtained, the developed PLL gives better fault ride when unbalances in the three phase input signals are overall handled well by the PLL system as it locks the two signal back within the first cycle. It also overcomes a phase jump after 5 milli-seconds from the time the fault was introduced and performs better tracking of the grid voltage and that of the renewable energy source.

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Published

2017-03-20

Issue

Vol. 13 No. 1 (2016)

Section

Articles

License

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